6" Silicon Epitaxial Wafer Substrate Thickness 290±20µm / Resistivity 0.008-0.025Ωcm , Epi Layer Thickness 10-15μm

6" Silicon Epitaxial Wafer Substrate Thickness 290±20µm / Resistivity 0.008-0.025Ωcm , Epi Layer Thickness 10-15μm

PAM-XIAMEN custom epitaxial or EPI wafer services on silicon wafers for research and development or mass production. PAM-XIAMEN processes single crystalline EPI layers on wafer diameters from 50mm to 150mm. Epitaxy is offered on bare wafers or those with buried layers, patterns or advanced device structures. For epitaxial layer deposition, it is important to determine what type EPI layer the application requires before determining how to deposit it. Homoepitaxy is when a crystalline film is grown with the same material as the substrate. Heteroepitaxy is more common, and grows a crystalline film made of a different material than the substrate. Depending on the type epi layer, there are three different ways that they can be deposited. PAM-XIAMEN offers epitaxial wafers with diameters up to 300mm. While 300mm EPI wafers are primarily used in highly integrated semiconductor elements (ICs), smaller diameters are also used for power applications. In order to satisfy the various requirements, substrates and epitaxial layers are designed according to customer specifications

6" Silicon Epitaxial Wafer Substrate Thickness 290±20µm / Resistivity 0.008-0.025Ωcm, Epi Layer Thickness 10-15μm / Resistivity 10-16Ωcm

What is silicon epitaxial wafer?

Silicon epi wafers were first developed around 1966, and achieved commercial acceptance by the early 1980s.[5] Methods for growing the epitaxial layer on monocrystalline silicon or other wafers include: various types of chemical vapor deposition (CVD) classified as Atmospheric pressure CVD (APCVD) or metal organic chemical vapor deposition (MOCVD), as well as molecular beam epitaxy (MBE). Two "kerfless" methods (without abrasive sawing) for separating the epitaxial layer from the substrate are called "implant-cleave" and "stress liftoff". A method applicable when the epi-layer and substrate are the same material employs ion implantation to deposit a thin layer of crystal impurity atoms and resulting mechanical stress at the precise depth of the intended epi layer thickness. The induced localized stress provide a controlled path for crack propagation in the following cleavage step.[7] In the dry stress lift-off process applicable when the epi-layer and substrate are suitably different materials, a controlled crack is driven by a temperature change at the epi/wafer interface purely by the thermal stresses due to the mismatch in thermal expansion between the epi layer and substrate, without the necessity for any external mechanical force or tool to aid crack propagation. It was reported that this process yields single atomic plane cleavage, reducing the need for post lift-off polishing, and allowing multiple reuses of the substrate up to 10 times

Are You Looking for an Silicon Wafer?

PAM-XIAMEN is your go-to place for semiconductor wafers, including Silicon wafers, as we have been doing it for almost 30 years! Send us enquiry to learn more about the wafers that we offer and how we can help you with your next project. Our group team can give you technology support. send us email at sales@powerwaywafer.com or powerwaymaterial@gmail.com